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Reconfigurable Computational Laboratory

Sponsored by: Missle Defense Agency (MDA)​


The Reconfigurable Computational Laboratory is dedicated to development of embedded hardware devices for computational algorithms. Primary hardware targets are FPGA, and Microprocessor platforms. The lab contains a number of FPGA development boards from Digilent, Inc. The primary device utilized by students is the NEXYS 2 board with a Spartan 2 FPGA (Xilinx) and a 16 megabyte static ram chip.  This board has many general purpose interface devices and connections and is suitable for project development.  It uses a general USB cable interface to LINUX or Windows PC’s, and the Xilinx software development environment works with either operating system.  The BEE3, a large multi-FPGA system from BEECube, Inc. is hosted in the lab as well.


VHDL language is the primary means for specification of digital circuitry, but can become cumbersome for large-scale project. Impluse C (IMC) from Impulse Technologies is also being used to develop prototype FPGA algorithms within the lab.  This structured language process design is based on an input/output data stream approach. The user defines the input and output data streams and specifies how the intermediate processes interconnect.  Once this data flow is determined the user specifies the processes logic functions.   Examples of serial processes using multiple inputs have been tested.  The input streams are unlike traditional programming input/output streams in that the FPGA chip allows for asynchronous, synchronous, and vastly parallel data movement and logic processes.  Thus the “high level” nature of Impulse C still requires the careful logic and data movement design processes.  The advantage is that once a parallel process has been defined in the structured manner of IMC the actual implementation is left to the resource allocation phase which attempt to use all available FPGA resources.  The user does not have to manually do this difficult task.